The invention describes an IGBT (Insulated Gate Bipolar Transistor) with a trench gate structure. IGBTs with trench gate structure have recently become known in the art. Trench structures in general are used to a large extent in the fabrication of storage cells for highly-integrated storage circuits. Also known are power semiconductor components with trench structures, which in particular have been used for some time to realize the gate complex. For example, vertical DMOS transistors (double-diffused MOS transistors) are used for a lower voltage range (&lt;100 V).
For these trench MOS transistors, narrow trenches are used with low vertical depths, such as about 1.5 .mu.m in depth and about 1.5 .mu.m in width for a 50 V MOSFET. A high density of these trench structures is desirable, so that a high canal width per surface unit can be achieved. The fabrication of the trench gate complex for these trench MOS transistors is taught in EP 0698 919 A2. Also desirable is low Miller capacitance and small forward voltage because IGBTs are frequently used in high frequency applications.
The technical background of trench technology will first be described in detail referring to an issued United States patent, since trench gate structures have also been suggested and used for IGBT (IEDM, Techn. Digest, pp. 674-677, 1987).
FIG. 1 shows an unscaled cross-sectional view of a MOS transistor with a trench structure according to the prior art. A distinction is usually made between a non-punch-through IGBT structure shown in FIG. 1 and a punch-through IGBT. The non-punch-through IGBT is characterized by a thick n.sup.- substrate 1 and a thin p layer 12, implanted on the backside, as a collector of the overall component, as shown in FIG. 1. The punch-through version (not shown) is characterized by a p.sup.+ substrate to which a first n-doped intermediate layer and a second lower-doped epitaxically segregated n.sup.- layer have been fitted.
The cell structure on the top side of the wafer is the same for both types. It consists of p bulk region 2, n.sup.+ source regions 3 and p.sup.+ bulk connection regions 4 which are interrupted by vertical etching trenches 5 in the form of stripes or lattices as will be discussed more fully below. These trench structures 5 are provided on all sides with gate insulator 6, filled with polysilicon gate 7 and covered at the top with passivation layer 8 and aluminum 9.
Polysilicon gate 7, gate insulator 6 and p region 2 form a MOS condenser of the internal MOSFET whose channel 11 forms between n.sup.+ source region 3 and n.sup.- substrate 1 vertically along the side wall of trench 5. The trench gate structures are connected with each other to form joint gate connection 15.
N.sup.+ source regions 3 and p.sup.+ bulk connection regions of all cells thus formed are connected to each other with aluminum metallization 9. The metallization constitutes the emitter 14 of the IGBT. The entire structure, with the exception of the bond surfaces, is covered with passivation layer 10. The collector 16 of the IGBT is formed by further metallization 13 on the backside of the wafer.
In the relevant sector of power electronics, prior art contains the problems involved in the application of trenches for thyristors with turn-off capability in MOS technology.
In U.S. Pat. No. 5,329,142, the disclosure of which is hereby incorporated by reference, the semiconductor problems in IEGT technology for MOS-controlled thyristors are described in great detail and very conscientiously. Multiple trench structures are shown. Those structures are a prerequisite for the reinforcement in thyristor technology in high-tension loads when one wishes to achieve small conducting-stage voltages. That is the only way to achieve a massive increase in the effect of electron injection in thyristor technology.
The patent describes in detail the MOS thyristor structure with two switchable states. A p.sup.+ region is formed on an n.sup.+ region, both of which are connected to a cathode. A p.sup.+ region is formed below these two regions such that it is not connected to the cathode. The p.sup.- region is located above an n.sup.- region. All of these regions are adjacent to an isolated trench gate construction. This structure results in a vertical MOS thyristor with turn-off capability. A vertical n channel transistor is formed with the n.sup.+ region, p.sup.- region, n.sup.- region and the trench gate. The n channel MOSFET is turned on at positive gate voltage (the turn-on transistor of the thyristor). The structure also forms a vertical p channel transistor with the p.sup.+ region, n.sup.+ region, p.sup.- region, n.sup.- region and the trench gate. The p channel MOSFET is switched on at negative gate voltage (the turn-off transistor of the thyristor).
Due to the large gate surfaces, the Miller capacitance increases considerably, which leads to higher switching losses. In circuits with thyristor drives, this fact matters little since small operating frequencies are used, and the advantage of minimum forward voltages has priority.
The disclosures of the prior art could not be used, however, to solve the present problem with the use of an IGBT. This is because small forward voltages as well as a comparatively small Miller capacitance are required to achieve a better compromise between forward voltage and switching losses when dealing with higher operating frequencies.
The following references show solutions using an IEGT structure and thus are not relevant to the objective of the present invention which relates to an IGBT:
U.S. Pat. No. 5,448,083; PA1 Mitsuhiko Kitagawa et al: "4500 V IEGTs having Switching Characteristics Superior to GTO" in Proceedings of 1995 International Symposium on Power Semiconductor Devices & ICs, Yokahama, pp. 486-490, and PA1 Mitsuhiko Kitagawa et al: "A 4500 V Injection-Enhanced Insulated Gate Bipolar Transistor . . . " in JEDM (1993), pp. 679-682.
Other solutions, such as those in DE 43 24 481 A1 relate to a purely marginal structure of IGBT.
Mitsubishi (Proc. ISPSD '94, pp.411-416, Davos, 1994) was derived from trench MOSFET structures and introduced trench gates with a depth of 3 .mu.m and a width of 1 .mu.m for a 600 V IGBT. The distance of the stripe-shaped trenches varied between 3.5 .mu.m and 14 .mu.m. For shorter distances, a high density of the trench structures is achieved as well in these trench IGBTs (TIGBT).
In comparison with an IGBT with planar gate, TIGBT of this kind achieve a clearly reduced forward voltage. This reduction is achieved primarily through the low channel resistance due to the large channel width per surface unit. However, there is a disadvantage that due to the large channel width, the saturation voltage level is several times higher than in an IGBT with planar gate. This considerably shortens the time period in which the component can withstand a short circuit without being destroyed.
Most recently, further improvements and changes of the trench gate complex have been suggested. Thus, a deepening of the trench gate, for example from 3 .mu.m to 5 .mu.m or 9 .mu.m further lowers the forward voltage. However, the corners of these narrow and deep structures are considerably stressed when blocking voltage is applied, which leads to a reduction in the static barrier capacity and the avalanche resistance in case of dynamic stress.
However, an improved compromise for all important parameters is achieved when the trench gate complex is made very wide. In this case, wide means that the trench width becomes several times the trench depth. Such structures were introduced in the Colloquium "Semiconductor Components and the Material Quality of Silicon", Freiburg, 1995, and in ISPSD, Yokohama, 1995, pp. 224-229.
In FIG. 2 wide trench structures 5 are provided with gate insulator 6, completely filled with polysilicon gate 7 and covered at the top with passivation layer 8 and aluminum 9. Analogous to FIG. 1, between wide trench gate structures 5 arranged in stripes or lattices, p bulk regions 2, n.sup.+ source regions 3 and p.sup.+ bulk connection regions 4 are disposed.
The enlarged trench width results in large cells, and thus the channel width per surface unit is considerably smaller than that of the structure in FIG. 1. Although this increases the channel resistance of the internal MOSFET, a smaller forward voltage is achieved for the overall component with a trench depth that is only slightly larger than the penetration depth of the P bulk region than with narrow and very deep structures. Due to the reduced channel width, the saturation voltage level is considerably reduced and lies in the range of the values for IGBT with planar gate. Stress on the trench corners in case of blocking voltage is also considerably lower in comparison with narrow and deep trenches.
However, no practical applications for a TIGBT with a wide trench gate complex are known. In particular the filling and planarization of the trench is not easily achievable with conventional pure segregation methods. This requires combinations of segregation methods and mechanical/chemical planarization methods. Furthermore, as the gate surface is enlarged, the so-called Miller capacitance increases. Knowledge concerning the function and characteristics of IGBT with such a trench gate complex is part of the prior art.